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LT1961 1.5A, 1.25MHz Step-Up Switching Regulator
FEATURES
s s s s s s s
DESCRIPTIO
s s s s
s
1.5A Switch in a Small MSOP Package Constant 1.25MHz Switching Frequency Wide Operating Voltage Range: 3V to 25V High Efficiency 0.2 Switch 1.2V Feedback Reference Voltage 2% Overall Output Voltage Tolerance Uses Low Profile Surface Mount External Components Low Shutdown Current: 6A Synchronizable from 1.5MHz to 2MHz Current-Mode Loop Control Constant Maximum Switch Current Rating at All Duty Cycles* Thermally Enhanced Exposed Pad Package
The LT(R)1961 is a 1.25MHz monolithic boost switching regulator. A high efficiency 1.5A, 0.2 switch is included on the die together with all the control circuitry required to complete a high frequency, current-mode switching regulator. Current-mode control provides fast transient response and excellent loop stability. New design techniques achieve high efficiency at high switching frequencies over a wide operating voltage range. A low dropout internal regulator maintains consistent performance over a wide range of inputs from 24V systems to Li-Ion batteries. An operating supply current of 1mA maintains high efficiency, especially at lower output currents. Shutdown reduces quiescent current to 6A. Maximum switch current remains constant at all duty cycles. Synchronization allows an external logic level signal to increase the internal oscillator from 1.5MHz to 2MHz. The LT1961 is available in an exposed pad, 8-pin MSOP package. Full cycle-by-cycle switch current limit protection and thermal shutdown are provided. High frequency operation allows the reduction of input and output filtering components and permits the use of chip inductors.
, LTC and LT are registered trademarks of Linear Technology Corporation. *Patent Pending
APPLICATIO S
s s s s
DSL Modems Portable Computers Battery-Powered Systems Distributed Power
TYPICAL APPLICATIO
6.8H
5V to 12V Boost Converter
UPS120 VIN 5V 2.2F CERAMIC 1 VIN VSW 2 90.9k LT1961 OPEN OR 5 6 SHDN FB HIGH SYNC GND VC = ON 8 3,4 7 6800pF 100pF 6.8k
EFFICIENCY (%)
VOUT 12V 0.5A*
10k 1%
10F CERAMIC
*MAXIMUM OUTPUT CURRENT IS SUBJECT TO THERMAL DERATING.
1961 TA01
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Efficiency vs Load Current
90 85 80 75 70 65 60 VIN = 5V VOUT = 12V 0 100 200 300 400 LOAD CURRENT (mA) 500
1961 TA01a
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LT1961
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW VIN SW GND GND 1 2 3 4 8 7 6 5 SYNC VC FB SHDN
Input Voltage .......................................................... 25V Switch Voltage ......................................................... 35V SHDN Pin ............................................................... 25V FB Pin Current ....................................................... 1mA SYNC Pin Current .................................................. 1mA Operating Junction Temperature Range (Note 2) LT1961E .......................................... - 40C to 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LT1961EMS8E MS8E PART MARKING LTQY
MS8E PACKAGE 8-LEAD PLASTIC MSOP GROUND PAD CONNECTED TO LARGE COPPER AREA TJMAX = 125C, JA = 50C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER Recommended Operating Voltage Maximum Switch Current Limit Oscillator Frequency Switch On Voltage Drop VIN Undervoltage Lockout VIN Supply Current VIN Supply Current/ISW Shutdown Supply Current Feedback Voltage FB Input Current FB to VC Voltage Gain FB to VC Transconductance VC Pin Source Current VC Pin Sink Current VC Pin to Switch Current Transconductance VC Pin Minimum Switching Threshold VC Pin 1.5A ISW Threshold Maximum Switch Duty Cycle Duty Cycle = 0% 0.4V < VC < 0.9V IVC = 10A VFB = 1V VFB = 1.4V 3.3V < VIN < 25V ISW = 1.5A (Note 3) ISW = 0A ISW = 1.5A CONDITION
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 15V, VC = 0.8V, SHDN, SYNC and switch open unless otherwise noted.
MIN
q q q q q q
TYP 2 310
MAX 25 3 1.5 500 2.73 1.3 20 45 1.218 1.224 - 0.4 1300 - 165 165
UNITS V A MHz mV V mA mA/A A A V V A Mho A A A/V V V % % %
3 1.5 1 2.47 2.6 0.9 27 6
VSHDN = 0V, VIN = 25V, VSW = 25V
q
3V < VIN < 25V, 0.4V < VC < 0.9V
q q
1.182 1.176 0 150 500 - 85 70
1.2 - 0.2 350 850 - 120 110 2.4 0.3 0.9
q q q
VC = 1.2V, ISW = 100mA VC = 1.2V, ISW = 1A, 25C TA 125C VC = 1.2V, ISW = 1A, TA 25C SHDN = 60mV Above Threshold SHDN = 100mV Below Threshold
q
80 75 70 1.28 -7 4 1.5
90 80 75 1.35 -10 7 1.5 1.42 -13 10 2.2 2 20
SHDN Threshold Voltage SHDN Input Current (Shutting Down) SHDN Threshold Current Hysteresis SYNC Threshold Voltage SYNC Input Frequency SYNC Pin Resistance ISYNC = 1mA
q q
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V A A V MHz k
LT1961
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1961E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the - 40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Minimum input voltage is defined as the voltage where the internal regulator enters lockout. Actual minimum input voltage to maintain a regulated output will depend on output voltage and load current. See Applications Information.
TYPICAL PERFORMANCE CHARACTERISTICS
FB vs Temperature
1.22 400 125C 350 SWITCH VOLTAGE (mV) 1.21 300 250 200 150 100 50 1.18 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 0 0 1 0.5 SWITCH CURRENT (A) 1.5
1961 G02
1.20
-40C
FREQUENCY (MHz)
FB VOLTAGE (V)
1.19
SHDN Threshold vs Temperature
1.40
7 6
1.38
SHDN THRESHOLD (V) VIN CURRENT (A) SHDN INPUT (A) 5 4 3 2 1
1.36
1.34
1.32
1.30 -50
-25
0 25 50 75 TEMPERATURE (C)
UW
100
Switch On Voltage Drop
1.5
Oscillator Frequency
TA = 25C
25C
1.4
1.3
1.2
1.1 -50
-25
0 25 50 75 TEMPERATURE (C)
100
125
1961 G01
1961 G03
SHDN Supply Current vs VIN
TA = 25C SHDN = 0V -12 -10
SHDN IP Current vs Temperature
SHUTTING DOWN -8 -6 -4 -2 0 -50
STARTING UP
0
125
0
5
10
15 VIN (V)
20
25
30
1961 G05
-25
0 25 50 75 TEMPERATURE (C)
100
125
1961 G04
1961G06
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LT1961 TYPICAL PERFOR A CE CHARACTERISTICS
SHDN Supply Current
300 250 VIN CURRENT (A) 200 150 100 50 0 TA = 25C VIN = 15V 1200 1000 VIN CURRENT (A) 800 600 400 200 0 0 5 10 15 20 INPUT VOLTAGE (V) 25 30
1961 G08
SWITCH PEAK CURRENT (A)
0
0.2
0.4 0.6 0.8 1 1.2 SHUTDOWN VOLTAGE (V)
PIN FUNCTIONS
FB: The feedback pin is used to set output voltage using an external voltage divider that generates 1.2V at the pin with the desired output voltage. If required, the current limit can be reduced during start up when the FB pin is below 0.5V (see the Current Limit Foldback graph in the Typical Performance Characteristics section). An impedance of less than 5k at the FB pin is needed for this feature to operate. VIN: This pin powers the internal circuitry and internal regulator. Keep the external bypass capacitor close to this pin. GND: Short GND pins 3 and 4 and the exposed pad on the PCB. The GND is the reference for the regulated output, so load regulation will suffer if the "ground" end of the load is not at the same voltage as the GND of the IC. This condition occurs when the load current flows through the metal path between the GND pins and the load ground point. Keep the ground path short between the GND pins and the load and use a ground plane when possible. Keep the path between the input bypass and the GND pins short. The exposed pad should be attached to a large copper area to improve thermal resistance. VSW: The switch pin is the collector of the on-chip power NPN switch and has large currents flowing through it. Keep the traces to the switching components as short as possible to minimize radiation and voltage spikes. SYNC: The sync pin is used to synchronize the internal oscillator to an external signal. It is directly logic compatible and can be driven with any signal between 20% and 80% duty cycle. The synchronizing range is equal to initial operating frequency, up to 2MHz. See Synchronization section in Applications Information for details. When not in use, this pin should be grounded. SHDN: The shutdown pin is used to turn off the regulator and to reduce input drain current to a few microamperes. The 1.35V threshold can function as an accurate undervoltage lockout (UVLO), preventing the regulator from operating until the input voltage has reached a predetermined level. Float or pull high to put the regulator in the operating mode. VC: The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally used for frequency compensation, but can do double duty as a current clamp or control loop override. This pin sits at about 0.3V for very light loads and 0.9V at maximum load.
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UW
1.4
1961 G07
Input Supply Current
TA = 25C 2.0
Current Limit Foldback
TA = 25C 40
FB INPUT CURRENT (A)
1.5 SWITCH CURRENT 1.0
30
MINIMUM INPUT VOLTAGE
20
0.5 FB CURRENT 0
10
0
0.2
0.4 0.6 0.8 FEEDBACK VOLTAGE (V)
1
0 1.2
1961 G09
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LT1961
BLOCK DIAGRAM
The LT1961 is a constant frequency, current-mode boost converter. This means that there is an internal clock and two feedback loops that control the duty cycle of the power switch. In addition to the normal error amplifier, there is a current sense amplifier that monitors switch current on a cycle-by-cycle basis. A switch cycle starts with an oscillator pulse which sets the RS flip-flop to turn the switch on. When switch current reaches a level set by the inverting input of the comparator, the flip-flop is reset and the switch turns off. Output voltage control is obtained by using the output of the error amplifier to set the switch current trip point. This technique means that the error
VIN 1
2.5V BIAS REGULATOR
SYNC
8
SHUTDOWN COMPARATOR
1.35V
3A ERROR AMPLIFIER gm = 850Mho
7 VC
Figure 1. Block Diagram
-
SHDN
5
+
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amplifier commands current to be delivered to the output rather than voltage. A voltage fed system will have low phase shift up to the resonant frequency of the inductor and output capacitor, then an abrupt 180 shift will occur. The current fed system will have 90 phase shift at a much lower frequency, but will not have the additional 90 shift until well beyond the LC resonant frequency. This makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response. A comparator connected to the shutdown pin disables the internal regulator, reducing supply current.
INTERNAL VCC SLOPE COMP
0.3V
1.25MHz OSCILLATOR
S CURRENT COMPARATOR RS FLIP-FLOP R CURRENT SENSE AMPLIFIER VOLTAGE GAIN = 40 DRIVER CIRCUITRY
2 Q1 POWER SWITCH
SW
+ -
7A
+
0.01
-
+
-
6
FB
3 1.2V 4
GND GND
1767 F01
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LT1961
APPLICATIONS INFORMATION
FB RESISTOR NETWORK The suggested resistance (R2) from FB to ground is 10k 1%. This reduces the contribution of FB input bias current to output voltage to less than 0.2%. The formula for the resistor (R1) from VOUT to FB is:
R1 = R2 VOUT - 1. 2
1.2 - R2(0.2A)
(
)
LT1961 ERROR AMPLIFIER
VSW OUTPUT
+ -
1.2V FB R1
+
R2 10k
1961 F02
VC
GND
Figure 2. Feedback Network
OUTPUT CAPACITOR Step-up regulators supply current to the output in pulses. The rise and fall times of these pulses are very fast. The output capacitor is required to reduce the voltage ripple this causes. The RMS ripple current can be calculated from: IRIPPLE(RMS) = IOUT
(VOUT - VIN) / VIN
The LT1961 will operate with both ceramic and tantalum output capacitors. Ceramic capacitors are generally chosen for their small size, very low ESR (effective series resistance), and good high frequency operation, reducing output ripple voltage. Their low ESR removes a useful zero in the loop frequency response, common to tantalum capacitors. To compensate for this, the VC loop compensation pole frequency must typically be reduced by a factor of 10. Typical ceramic output capacitors are in the 1F to 10F range. Since the absolute value of capacitance
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defines the pole frequency of the output stage, an X7R or X5R type ceramic, which have good temperature stability, is recommended. Tantalum capacitors are usually chosen for their bulk capacitance properties, useful in high transient load applications. ESR rather than absolute value defines output ripple at 1.25MHz. Values in the 22F to 100F range are generally needed to minimize ESR and meet ripple current ratings. Care should be taken to ensure the ripple ratings are not exceeded.
Table 1. Surface Mount Solid Tantalum Capacitor ESR and Ripple Current E Case Size ESR (Max, ) Ripple Current (A)
AVX TPS, Sprague 593D AVX TAJ D Case Size AVX TPS, Sprague 593D C Case Size AVX TPS 0.2 (typ) 0.5 (typ) 0.1 to 0.3 0.7 to 1.1 0.1 to 0.3 0.7 to 0.9 0.7 to 1.1 0.4
INPUT CAPACITOR Unlike the output capacitor, RMS ripple current in the input capacitor is normally low enough that ripple current rating is not an issue. The current waveform is triangular, with an RMS value given by: IRIPPLE(RMS) = 0.29 VIN VOUT - VIN
( )( ) (L)(f)(VOUT )
At higher switching frequency, the energy storage requirement of the input capacitor is reduced so values in the range of 1F to 4.7F are suitable for most applications. Y5V or similar type ceramics can be used since the absolute value of capacitance is less important and has no significant effect on loop stability. If operation is required close to the minimum input voltage required by either the output or the LT1961, a larger value may be necessary. This is to prevent excessive ripple causing dips below the minimum operating voltage resulting in erratic operation.
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LT1961
APPLICATIONS INFORMATION
INDUCTOR CHOICE AND MAXIMUM OUTPUT CURRENT When choosing an inductor, there are 2 conditions that limit the minimum inductance; required output current, and avoidance of subharmonic oscillation. The maximum output current for the LT1961 in a standard boost converter configuration with an infinitely large inductor is: LMIN = (VIN )2 (VOUT - VIN ) 0.4(VOUT )2 (IOUT )(f)
IOUT (MAX) = 1.5A
VIN * VOUT
Where = converter efficiency (typically 0.87 at high current). As the value of inductance is reduced, ripple current increases and IOUT(MAX) is reduced. The minimum inductance for a required output current is given by:
LMIN = VIN (VOUT - VIN ) (V )(I ) 2VOUT (f) 1.5 - OUT OUT VIN *
The second condition, avoidance of subharmonic oscillation, must be met if the operating duty cycle is greater than 50%. The slope compensation circuit within the LT1961 prevents subharmonic oscillation for inductor ripple currents of up to 0.7AP-P, defining the minimum inductor value to be:
LMIN =
VIN (VOUT - VIN ) 0.7VOUT (f)
These conditions define the absolute minimum inductance. However, it is generally recommended that to prevent excessive output noise, and difficulty in obtaining stability, the ripple current is no more than 40% of the average inductor current. Since inductor ripple is:
V (V -V ) IP -P RIPPLE = IN OUT IN VOUT (L)(f)
The recommended minimum inductance is:
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The inductor value may need further adjustment for other factors such as output voltage ripple and filtering requirements. Remember also, inductance can drop significantly with DC current and manufacturing tolerance. The inductor must have a rating greater than its peak operating current to prevent saturation resulting in efficiency loss. Peak inductor current is given by:
ILPEAK = (VOUT )(IOUT ) VIN (VOUT - VIN ) + VIN * 2VOUT (L)(f)
Also, consideration should be given to the DC resistance of the inductor. Inductor resistance contributes directly to the efficiency losses in the overall converter. Suitable inductors are available from Coilcraft, Coiltronics, Dale, Sumida, Toko, Murata, Panasonic and other manufactures.
Table 2
PART NUMBER Coiltronics TP1-2R2 TP2-2R2 TP3-4R7 TP4- 100 Murata LQH1C1R0M04 LQH3C1R0M24 LQH3C2R2M24 LQH4C1R5M04 Sumida CD73- 100 CDRH4D18-2R2 CDRH5D18-6R2 CDRH5D28-100 Coilcraft 1008PS-272M LPO1704-222M LPO1704-332M 2.7 2.2 3.3 1.3 1.6 1.3 0.14 0.12 0.16 2.7 1.0 1.0
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VALUE (uH) ISAT(DC) (Amps) DCR () HEIGHT (mm) 2.2 2.2 4.7 10 1.0 1.0 2.2 1.5 10 2.2 6.2 10 1.3 1.5 1.5 1.5 0.51 1.0 0.79 1 1.44 1.32 1.4 1.3 0.188 0.111 0.181 0.146 0.28 0.06 0.1 0.09 0.080 0.058 0.071 0.048 1.8 2.2 2.2 3.0 1.8 2.0 2.0 2.6 3.5 1.8 1.8 2.8
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LT1961
APPLICATIONS INFORMATION
CATCH DIODE The suggested catch diode (D1) is a UPS120 or 1N5818 Schottky. It is rated at 1A average forward current and 20V/30V reverse voltage. Typical forward voltage is 0.5V at 1A. The diode conducts current only during switch off time. Peak reverse voltage is equal to regulator output voltage. Average forward current in normal operation is equal to output current. SHUTDOWN AND UNDERVOLTAGE LOCKOUT Figure 4 shows how to add undervoltage lockout (UVLO) to the LT1961. Typically, UVLO is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. UVLO prevents the regulator from operating at source voltages where these problems might occur.
LT1961 INPUT R1 SHDN R2 IN 3A 7A 1.35V VCC
C1
GND
1961 F04
Figure 4. Undervoltage Lockout
An internal comparator will force the part into shutdown below the minimum VIN of 2.6V. This feature can be used to prevent excessive discharge of battery-operated systems. If an adjustable UVLO threshold is required, the
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shutdown pin can be used. The threshold voltage of the shutdown pin comparator is 1.35V. A 3A internal current source defaults the open pin condition to be operating (see Typical Performance Graphs). Current hysteresis is added above the SHDN threshold. This can be used to set voltage hysteresis of the UVLO using the following: R1 = R2 = VH - VL 7A
(VH - 1.35V) + 3A
R1
1.35V
VH - Turn-on threshold VL - Turn-off threshold Example: switching should not start until the input is above 4.75V and is to stop if the input falls below 3.75V. VH = 4.75V VL = 3.75V R1 = R2 = 4.75V - 3.75V = 143k 7A 1.35V 143k
(4.75V - 1.35V) + 3A
= 50.4k
Keep the connections from the resistors to the SHDN pin short and make sure that the interplane or surface capacitance to the switching nodes are minimized. If high resistor values are used, the SHDN pin should be bypassed with a 1nF capacitor to prevent coupling problems from the switch node.
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LT1961
APPLICATIONS INFORMATION
SYNCHRONIZATION The SYNC pin, is used to synchronize the internal oscillator to an external signal. The SYNC input must pass from a logic level low, through the maximum synchronization threshold with a duty cycle between 20% and 80%. The input can be driven directly from a logic level output. The synchronizing range is equal to initial operating frequency up to 2MHz. This means that minimum practical sync frequency is equal to the worst-case high self-oscillating frequency (1.5MHz), not the typical operating frequency of 1.25MHz. Caution should be used when synchronizing above 1.7MHz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. Higher inductor values will tend to eliminate this problem. See Frequency Compensation section for a discussion of an entirely different cause of subharmonic switching before assuming that the cause is insufficient slope compensation. Application Note 19 has more details on the theory of slope compensation. LAYOUT CONSIDERATIONS As with all high frequency switchers, when considering layout, care must be taken to achieve optimal electrical, thermal and noise performance. For maximum efficiency, switch rise and fall times are typically in the nanosecond range. To prevent noise both radiated and conducted, the high speed switching current path, shown in Figure 5, must be kept as short as possible. This is implemented in the suggested layout of Figure 6. Shortening this path will also reduce the parasitic trace inductance of approximately 25nH/inch. At switch off, this parasitic inductance produces a flyback spike across the LT1961 switch. When operating at higher currents and output voltages, with poor layout, this spike can generate voltages across the LT1961 that may exceed its absolute maximum rating. A ground plane should always be used under the switcher circuitry to prevent interplane coupling and overall noise. The VC and FB components should be kept as far away as possible from the switch node. The LT1961 pinout has been designed to aid in this. The ground for these components should be separated from the switch current path. Failure to do so will result in poor stability or subharmonic like oscillation. Board layout also has a significant effect on thermal resistance. The exposed pad is the copper plate that runs under the LT1961 die. This is the best thermal path for heat out of the package. Soldering the pad onto the board will reduce die temperature and increase the power capability of the LT1961. Provide as much copper area as possible around this pad. Adding multiple solder filled feedthroughs under and around the pad to the ground plane will also help. Similar treatment to the catch diode and inductor terminations will reduce any additional heating effects.
C3 SW LT1961 VIN
Figure 5. High Speed Switching Path
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L1 D1 VOUT
HIGH FREQUENCY SWITCHING PATH
C1 LOAD
GND
1961 F05
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LT1961
APPLICATIONS INFORMATION
L1 6.8H D1 UPS120 INPUT 5V C3 2.2F CERAMIC VIN OPEN OR HIGH = ON LT1961 SHDN SYNC FB R2 10k 1% C1 10F CERAMIC VSW R1 90.9k VC
*MAXIMUM OUTPUT CURRENT IS SUBJECT TO THERMAL DERATING.
INPUT
L1 C3
D1
MINIMIZE LT1961, C1, D1 LOOP C1
VOUT
KELVIN SENSE VOUT
Figure 6. Typical Application and Suggested Layout (Topside Only Shown)
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OUTPUT 12V 0.5A*
GND
C2 6800pF R3 6.8k
C4 100pF
GND
R3
C4
LT1961EMS8E
C2
KEEP FB AND VC COMPONENTS AWAY FROM HIGH FREQUENCY, HIGH INPUT COMPONENTS U1
GND
R2
R1
PLACE FEEDTHROUGHS AROUND GROUND PIN FOR GOOD THERMAL CONDUCTIVITY
SOLDER EXPOSED GROUND PAD TO BOARD
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LT1961
APPLICATIONS INFORMATION
THERMAL CALCULATIONS Power dissipation in the LT1961 chip comes from four sources: switch DC loss, switch AC loss, drive current, and input quiescent current. The following formulas show how to calculate each of these losses. These formulas assume continuous mode operation, so they should not be used for calculating efficiency at light load currents.
DC, duty cycle = ISW (VOUT - VIN ) VOUT (V )(I ) = OUT OUT VIN
Switch loss:
PSW = (DC )(ISW )2 (RSW ) + 17n ISW VOUT f
( )(
)( )
VIN loss:
(VIN )(ISW )(DC ) + 1mA(VIN ) 50 RSW = Switch resistance ( 0.27 hot) PVIN =
Example: VIN = 5V, VOUT = 12V and IOUT = 0.5A Total power dissipation = 0.23 + 0.31 + 0.07 + 0.005 = 0.62W Thermal resistance for LT1961 package is influenced by the presence of internal or backside planes. With a full plane under the package, thermal resistance will be about 50C/W. To calculate die temperature, use the appropriate thermal resistance number and add in worst-case ambient temperature: TJ = TA + JA (PTOT) If a true die temperature is required, a measurement of the SYNC to GND pin resistance can be used. The SYNC pin resistance across temperature must first be calibrated,
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with no device power, in an oven. The same measurement can then be used in operation to indicate the die temperature. FREQUENCY COMPENSATION Loop frequency compensation is performed on the output of the error amplifier (VC pin) with a series RC network. The main pole is formed by the series capacitor and the output impedance (500k) of the error amplifier. The pole falls in the range of 2Hz to 20Hz. The series resistor creates a "zero" at 1kHz to 5kHz, which improves loop stability and transient response. A second capacitor, typically one-tenth the size of the main compensation capacitor, is sometimes used to reduce the switching frequency ripple on the VC pin. VC pin ripple is caused by output voltage ripple attenuated by the output divider and multiplied by the error amplifier. Without the second capacitor, VC pin ripple is:
VC Pin Ripple = 1.2(VRIPPLE)(gm)(RC) (VOUT)
VRIPPLE = Output ripple (VP-P) gm = Error amplifier transconductance (850mho) RC = Series resistor on VC pin VOUT = DC output voltage
To prevent irregular switching, VC pin ripple should be kept below 50mVP-P. Worst-case VC pin ripple occurs at maximum output load current and will also be increased if poor quality (high ESR) output capacitors are used. The addition of a 47pF capacitor on the VC pin reduces switching frequency ripple to only a few millivolts. A low value for RC will also reduce VC pin ripple, but loop phase margin may be inadequate.
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LT1961
TYPICAL APPLICATIO S
VIN 5V TO 10V
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Dual Output Flyback Converter
R2 10k 1%
R1 115k 1% UPS140 T1*
+
C1 4.7F FB S/S LT1961 VC C2 2.2nF R3 10k VIN VSW
2, 3 P6KE-20A * 1N4148 8, 9
7
+ +
VOUT 15V C4 47F
OFF
ON
*4 10 *
C5 47F -VOUT -15V
1 UPS140
GND
C3 100pF
*DALE LPE-4841-100MB
LT1961 * TA02
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LT1961
TYPICAL APPLICATIO S
OFF
+
C1 4.7F 20V
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4V-9VIN to 5VOUT SEPIC Converter**
VIN** 4V TO 9V L1A* 10H VIN ON S/S LT1961 FB GND VC VSW
*
C2 4.7F
D1 UPS120 R2 31.6k 1%
VOUT 5V
*
L1B* 10H
+
R3 10k 1%
C3 47F 10V
R1 10k C4 2.2nF
C5 100pF
MAX I OUT
LT1961 * TA03
* BH ELECTRONICS 511-1012 ** INPUT VOLTAGE MAY BE GREATER OR LESS THAN OUTPUT VOLTAGE
IOUT 0.59A 0.65A 0.70A 0.74A 0.80A
VIN 4V 5V 6V 7V 9V
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LT1961
TYPICAL APPLICATIO S
+
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Single Li-Ion Cell to 5V
L1 4.7H
D1 UPS120 VOUT 5V R1 31.6k 1%
VIN OFF SINGLE Li-Ion CELL ON S/S LT1961 VSW
+
C1 10F
FB GND C2 2.2nF R3 10k VC R2 10k 1% C3 100pF
+
C4 47F 10V
LT1961 * TA04
IOUT VIN 0.75A 2.7V 0.93A 3.3V 1.0A 3.6V
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LT1961
PACKAGE DESCRIPTION
MS8E Package 8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
2.794 0.102 (.110 .004)
5.23 (.206) MIN
0.42 0.04 (.0165 .0015) TYP
RECOMMENDED SOLDER PAD LAYOUT DETAIL "A" 0 - 6 TYP 4.90 0.15 (1.93 .006) 3.00 0.102 (.118 .004) NOTE 4
0.254 (.010) GAUGE PLANE
0.18 (.077) SEATING PLANE 0.22 - 0.38 (.009 - .015) TYP 0.13 0.076 (.005 .003)
MSOP (MS8E) 0802
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
BOTTOM VIEW OF EXPOSED PAD OPTION 1 0.889 0.127 (.035 .005) 2.06 0.102 (.080 .004) 1.83 0.102 (.072 .004)
2.083 0.102 3.2 - 3.45 (.082 .004) (.126 - .136) 8 0.65 (.0256) BSC 3.00 0.102 (.118 .004) (NOTE 3) 0.52 (.206) REF
8
7 65
0.53 0.015 (.021 .006) DETAIL "A"
1 1.10 (.043) MAX
23
4 0.86 (.034) REF
0.65 (.0256) BSC
sn1961 1961fs
15
LT1961
TYPICAL APPLICATIO
L1 5 4 1
150 MUR405
VIN 12V TO 25V
+
2.2F
10F
RELATED PARTS
PART NUMBER LT1308A LT1310 LT1370 LT1371 LT1372/LT1377 LTC3400/ LTC3400B LTC3401 LTC3402 LTC3405/ LTC3405A DESCRIPTION 600kHz, 2A, Step-Up Regulator 4.5MHz, 1.5A Step-Up with Phase Lock Loop High Efficiency DC/DC Converter High Efficiency DC/DC Converter 500kHz and 1MHz High Efficiency 1.5A Switching Regulators 1.2MHz, 600mA, Synchronous Step-Up Single Cell, High Current (1A), Micropower, Synchronous 3MHz Step-Up DC/DC Converter Single Cell, High Current (2A), Micropower, Synchronous 3MHz Step-Up DC/DC Converter 1.5MHz High Efficiency, IOUT = 300mA, Monolithic Synchronous Step-Down Regulator COMMENTS 30V Switch, VIN = 1V to 6V, Low Battery Comparator, S8 Package 34V Switch, VIN = 2.75V to 18V, VOUT up to 35V, MS10E Package 42V Switch, 6A, 500kHz Switch, DD-Pak, TO-220 Package 35V Switch, 3A, 500kHz Switch, DD-Pak, TO-220 Package Boost Topology, VIN(MIN) = 2.7V, S8 Package VIN = 2.6V to 16V, VOUT up to 34V, Integrated SS, MS8 Package VIN = 0.85V to 5V, VOUT to 5.5V, Up to 95% Efficiency, ThinSOT Package VIN = 0.85V to 5V, VOUT to 5.5V, Up to 97% Efficiency Synchronizable, Oscillator from 100kHz to 3MHz, MS10 Package VIN = 0.85V to 5V, VOUT to 5.5V, Up to 95% Efficiency Synchronizable, Oscillator from 100kHz to 3MHz, MS10 Package VIN = 2.5V to 5.5V, VOUT to 0.8V, Up to 95% Efficiency, 100% Duty Cycle, IQ = 20A, ThinSOT Package
LT1946/LT1946A 1.2MHz/2.7MHz, 1.5A, Monolithic Step-Up Regulator
ThinSOT is a trademark of Linear Technology Corporation.
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
U
High Voltage Laser Power Supply
0.01F 5kV 1800pF 10kV 47k 5W 1800pF 10kV 11 2 8 3 HV DIODES LASER
+
2.2F Q1 0.47F Q2
L2 10H
VSW VIN LT1961 VC GND FB
10k 0.1F
10k VIN 1N4002 (ALL) 190 1% L1 = COILTRONICS CTX02-11128 Q1, Q2 = ZETEX ZTX849 0.47F = WIMA 3X 0.15F TYPE MKP-20 HV DIODES = SEMTECH-FM-50 LASER = HUGHES 3121H-P COILTRONICS (407) 241-7876
+
LT1961 * TA05
sn1961 1961fs LT/TP 0203 2K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2001

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